Metastability Influenced PUF for Cryptographic Key Generation: A FPGA Approach
This paper presents a true random key generation using Physically Unclonable Function (PUF). PUFs are considered as ‚??physical fingerprint‚?? of anys Integrated Circuit (IC) through which they can be differentiated from others. They offer a plenty of applications namely Hardware authentication, Identification, Anti ‚?? counterfeiting to safeguard the hardware as well as the sensitive data being processed or stored in the hardware. A deeper insight is required into the design and implementation of hardware efficient FPGA based PUF with a focus on low area overhead. In this work, PUF architecture for key generation on Intel Cyclone II FPGA using Verilog HDL and Quartus II 13.0 Electronic Design Automation (EDA) tool has been proposed. SR latch based metastability is the main concern of PUF generation. Metastability on SR latch act as entropy source to generate true randomness. This design requires only four SR latches to produce adequate true randomness. Further, true randomness is extracted through harvesting mechanism where Meta beat counting and De - synchronization techniques have been investigated with respect to equidistribution property. Post processing unit has been incorporated to enhance the statistical properties of PUF. This design consumes 881 logic elements and dissipates 4.41 mW of power for implementing the PUF architecture on Cyclone II EP2C3F484C7 FPGA. Entropy, restart experiment and NIST SP 800 ‚?? 22 tests have been performed to evidence the true randomness.
Authentication, Digital fingerprint, FPGA and PUF