An FPGA-based Fast Linear Discharge Readout Scheme Enabling Simultaneous Time and Energy Measurements for TOF-PET Detectors
The readout electronics in Time-of-Flight Positron Emission Tomography (TOF-PET) detector modules conventionally contain a separate timing circuit and a separate energy measurement circuit. For channel-by-channel readouts, the front-end electronics will be unacceptably large and must rely on application specific integrated circuit (ASIC) chips. In this paper, we present a novel field programmable gate array (FPGA)-based readout scheme that unifies the time and energy measurements with only one analog amplifier per channel in addition to the FPGA. By constructing a simple and effective fast linear discharge circuit, one time-to-digital converter (TDC) per channel can implement time and energy readouts simultaneously with a short measurement dead time. To evaluate the performance of the new approach, a 16-channel PET detector module consisting of LYSO crystals coupled with a silicon photomultiplier (SiPM) array was constructed connecting to the readout electronics. Using a reference detector with a 164.7 ps time resolution to perform 22Na coincidence measurements, the average energy and time resolution among 16 channels were measured as 12.44% and 372.6 ps, respectively. The typical measurement dead time is approximately 300 ns. The test results show the simplicity and feasibility of the proposed readout scheme, which is particularly useful for laboratory instrumentation.
Fast linear discharge, FPGA, SiPM array, TOF-PET.