BE/BTech & ME/MTech Final Year Projects for Computer Science | Information Technology | ECE Engineer | IEEE Projects Topics, PHD Projects Reports, Ideas and Download | Sai Info Solution | Nashik |Pune |Mumbai
director@saiinfo settings_phone02536644344 settings_phone+919270574718 +919096813348 settings_phone+917447889268
logo


SAI INFO SOLUTION


Diploma | BE |B.Tech |ME | M.Tech |PHD

Project Development and Training

Search Project by Domainwise


A Parallel Quad Itoh-Tsujii Multiplicative Inversion Algorithm for FPGA Platforms


3D Reconstruction in Canonical
Abstract


Modular inversion in GF (2m) is one of the computationally intensive tasks in cryptographic applications like Elliptic Curve Cryptography (ECC). For hardware implementation over binary extended field, Itoh- Tsujii inversion Algorithm (ITA) using sequential multiplication and squaring is considered as the most efficient algorithm. In this paper, we propose a new parallel Quad ITA(QITA) over the National Institute of Standards and Technology (NIST) recommended trinomials to efficiently compute inverse operation on Field-Programmable Gate-Array (FPGA) platforms. Due to the implementation of novel short length addition chain and parallel Quadblock, areatime efficiency has been enhanced in this architecture. This modification allows the computation of inversion with reduced clock cycles comparatively. The experimental results reveal that the proposed parallel QITA algorithm improves the area-time performance as compared to other existing works.

KeyWords
Elliptic Curve Cryptography(ECC),Fermats Little Theorem (FLT), Itoh-Tsujii inversion Algorithm (ITA),Galois Field(GF)



Share
Share via WhatsApp
BE/BTech & ME/MTech Final Year Projects for Computer Science | Information Technology | ECE Engineer | IEEE Projects Topics, PHD Projects Reports, Ideas and Download | Sai Info Solution | Nashik |Pune |Mumbai
Call us : 09096813348 / 02536644344
Mail ID : developer.saiinfo@gmail.com
Skype ID : saiinfosolutionnashik