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Evaluating Soft-Core RISC-V Processor in SRAM-based FPGA under Radiation Effects


3D Reconstruction in Canonical
Abstract


This work evaluates the RISC-V Rocket processor embedded in a COTS SRAM-based FPGA under heavy-ion induced faults and emulation fault injection. We also analyze the efficiency of using mitigation techniques based on hardware redundancy and scrubbing. Results demonstrated an improvement of 3 in the cross-section when scrubbing and coarse grain triple modular redundancy are used. The Rocket processor presented analogous sensitivity to radiation effects as the state-of-the-art soft-processors. Due to the complexity of the system-on-chip, not only the Rocket core but also its peripherals should be protected with proper solutions. Such solutions should address the specific vulnerabilities of each component to improve the overall system reliability while maintaining the trade-off with performance.

KeyWords
Fault-tolerance, RISC-V, Rocket, COTS SRAMbased FPGA, Heavy Ion, Fault Injection.



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