FPGA based experimental evaluation of BLDC motor drive fed from coupled inductor based bridgeless SEPIC
This paper presents FPGA based experimental evaluation of BLDC motor drive fed from single-phase supply through coupled inductor based bridgeless SEPIC converter. This converter supplies an adjustable DC link voltage to the input of three-phase VSI, which serves as electronic commutator for the BLDC motor. The VSI is switched at the fundamental frequency determined by rotor position, and the variable DC link voltage provides adjustable speed (N â?? Vdc) in the proposed BLDC motor drive. The incorporation of coupled inductors for bridgeless SEPIC achieves compactness. The converter with coupled inductors ensures a similar performance with reduced size as that of the conventional bridgeless SEPIC. The bridgeless SEPIC incorporating coupling presented in this work has the improved features of compact size, reduced structure complexity, requirement of only one low side gate driver and the absense of circulating current. The converter can provide both supply current shaping and control of output voltage with only voltage control loop. The Artix 7, Xilinx FPGA is used to implement the control system consisting of electronic commutation logic for switching the VSI and PI controller based DC link voltage controller for switching the proposed front end converter. The control logic is implemented using Xilinx System Generator (XSG), model-based design tool in MATLAB/Simulink environment. The XSG model-based design is processed in Vivado Design Suite software to generate programmable bit file for FPGA. The experimental results are obtained to validate the achievement of adjustable speed and shaping of supply current in the proposed BLDC motor drive.
Bridgeless SEPIC, BLDC drive, Coupled Inductor, FPGA, Xilinx System Generator