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Architecture of Cobweb-Based Redundant TSV for Clustered Faults


3D Reconstruction in Canonical
Abstract


In this brief, a cobweb-based redundant through-siliconvia (TSV) design is proposed with efficient hardware as well as high repair rate to repair clustered faulty TSVs (FTSVs). The experimental simulation results demonstrate that for highly clustered faults, the repair rate of the proposed RTSV method is 48.59% and 1.75% higher than that of the ring-based and router-based RTSV methods, respectively. Furthermore, the proposed design can achieve 63.93% and 16.34% hardware reductions compared with the router-based and the ring-based design, respectively.

KeyWords
3-D integrated circuit (3-D IC), clustered faults, redundancy architecture, repair rate, through silicon via (TSV).



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