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A 300-mV Auto Shutdown Comparator-Based Continuous Time  Modulator


3D Reconstruction in Canonical
Abstract


In this brief, a 300-mV, auto shutdown comparator based on a novel clock gating network is proposed. The proposed auto shutdown comparator is further employed to realize a compact, ultralow power continuous-time  modulator (CTDSM) with a 300-mV supply voltage for multichannel sensing and biomedical applications. The design was fabricated in standard mixed-mode 180-nm CMOS process. Measurement results show that the CTDSM achieves a peak SNDR of 54.81 dB and DR of 57.4 dB while consuming a core power of 1.76 μW at 300-mV supply voltage without the clock-gated comparator. With the clock-gated auto shutdown comparator, the CTDSM consumes a core power of only 220 nW thereby providing an eight times power saving. Moreover, the fabricated CTDSM occupies an extremely small area of 0.0464 mm2 with an energy efficiency of 24.5 fJ/conv making it the most compact and energy-efficient CTDSM reported till date among the moderate resolution CTDSMs. Furthermore, by increasing the supply voltage to 400 mV, the CTDSM features a peak SNDR of 58.56 dB and DR of 64.1 dB while consuming a core power of 410 nW and 29.61 fJ/conv.

KeyWords
Analog-to-digital converter (ADC), comparator, continuous-time  modulator (CTDSM), oversampling ratio (OSR)



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